The W256 is a 3.3V/2.5V buffer designed to distribute high-speed clocks in PC applications. The part has 12 outputs. Designers can configure these outputs to support 3 unbuffered standard SDRAM DIMMs and 2 DDR DIMMs. The W256 can be used in conjunction with the W250-02 or similar clock synthesizer for the VIA Pro 266 chipset.
The W256 also includes an SMBus interface which can enable or disable each output clock. On power-up, all output clocks are enabled (internal pull-up).
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• One input to 12 output buffer/drivers• Supports up to 2 DDR DIMMs or 3 SDRAM DIMMS• One additional output for feedback• SMBus interface for individual output control• Low skew outputs (< 100 ps)• Supports 266 MHz and 333 MHz DDR SDRAM• Dedicated pin for power management support• Space-saving 28-pin SSOP package
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Supply Voltage to Ground Potential .................0.5 to +7.0V
DC Input Voltage (except BUF_IN) ........... 0.5V to VDD+0.5
Storage Temperature ..............................65°C to +150°C
Static Discharge Voltage ............................................>2000V
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Required Field 
